naps.soc package¶
Subpackages¶
Submodules¶
naps.soc.csr_types module¶
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class
naps.soc.csr_types.ControlSignal(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ast.Signal,naps.soc.csr_types._CsrJust a Signal. Indicator, that it is for controlling some parameter (i.e. can be written from the outside) Is mapped as a CSR in case the design is build with a SocPlatform.
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class
naps.soc.csr_types.EventReg(*args, src_loc_at=0, **kwargs)¶ Bases:
naps.soc.csr_types._CsrA “magic” register, that doesnt have to be backed by a real register. Useful for implementing resets, fifo interfaces, … The logic generated by the handle_read and handle_write hooks is part of the platform defined BusSlave and runs in its clockdomain.
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class
naps.soc.csr_types.PulseReg(*args, src_loc_at=0, **kwargs)¶ Bases:
naps.soc.csr_types.EventReg,nmigen.hdl.ir.ElaboratableA register that generates one cycle wide pulses when ones are written. The pulses happen in the CSR domain. Use a PulseSynchronizer to get one cycle wide pulses in another domain, so long as its clock speed is not slower than the CSR domain.
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elaborate(platform)¶
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class
naps.soc.csr_types.StatusSignal(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ast.Signal,naps.soc.csr_types._CsrJust a Signal. Indicator, that it is for communicating the state to the outside world (i.e. can be read but not written from the outside) Is mapped as a CSR in case the design is build with a SocPlatform.
naps.soc.devicetree_overlay module¶
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naps.soc.devicetree_overlay.devicetree_overlay(platform, overlay_name, overlay_content, placeholder_substitutions_dict=None)¶
naps.soc.fatbitstream module¶
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class
naps.soc.fatbitstream.CommandPosition(value)¶ Bases:
enum.EnumAn enumeration.
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Back= 2¶
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Front= 1¶
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class
naps.soc.fatbitstream.FatbitstreamContext(platform, called_by_get_classmethod=False)¶ Bases:
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add_cmd_unique(new_cmd: str, new_pos=<CommandPosition.Back: 2>)¶
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add_cmds(new_cmds: Union[str, Iterable[str]], new_pos=<CommandPosition.Back: 2>)¶
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generate_fatbitstream(file: BinaryIO, build_name: str, build_products: nmigen.build.run.BuildProducts)¶
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classmethod
get(platform)¶ Implements a singleton-like pattern here to have exactly one FatbitstreamContext per Platform instance :rtype: FatbitstreamContext
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platform_to_context_dict= {}¶
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class
naps.soc.fatbitstream.File(name, contents)¶ Bases:
object
naps.soc.hooks module¶
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naps.soc.hooks.address_assignment_hook(platform, top_fragment: nmigen.hdl.ir.Fragment, sames: naps.soc.tracing_elaborate.ElaboratableSames)¶
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naps.soc.hooks.csr_and_driver_item_hook(platform, top_fragment: nmigen.hdl.ir.Fragment, sames: naps.soc.tracing_elaborate.ElaboratableSames)¶
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naps.soc.hooks.peripherals_collect_hook(platform, top_fragment: nmigen.hdl.ir.Fragment, sames: naps.soc.tracing_elaborate.ElaboratableSames)¶
naps.soc.memorymap module¶
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class
naps.soc.memorymap.Address(address, bit_offset, bit_len=None, bus_word_width=32)¶ Bases:
object-
bits_of_word(word_address: int)¶ If the Address is part of the addressed word it returns a tuple of the range of own addressed bits and of the bits of the word. otherwise it returns None. :param word_address: the base address of the word. this is not an Address object but rather an int because we need only the base address. :return a tuple of (word_range, signal_range)
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collides(other_address)¶
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static
parse(obj, bus_word_width=32)¶ Parse an address object from either a string or pass an address object or none through. :param obj: either a string in the format 0xABCD[optional_python:slice] or an Address object or None :param bus_word_width: the native word width of the underlying bus in bits. :return: an address object or None
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range()¶ Return a range(start_byte, end_byte)
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translate(other)¶ Translate an other address by the current address :param other: the address to translate :return: the translated address
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class
naps.soc.memorymap.MemoryMap(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen._unused.MustUse-
property
absolute_range_of_direct_children¶
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add_alias(name, obj)¶ Adds an alias to a resource somewhere else in the hierarchy. :param name: the name of the resource :param obj: the object with which one can find the other resource
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add_driver_item(name, driver_item)¶
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allocate(name, writable, bits=None, address=None, obj=None)¶ Allocate / add a resource to the memorymap. :param name: the name of the resource :param writable: a boolean indicating if the resource is writable :param bits: the width of the peripheral :param address: the address to place the resource to (optional) :param obj: an object to attach to that memory location. In the case of hierarchical memorymaps, this is the sub memorymap :return: the address of the resource
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allocate_subrange(subrange, name=None, place_at=None)¶ Add a sub-memorymap to the Memorymap. :type subrange: MemoryMap :param name: the name of the subrange. If None the subrange be inlined into this memorymap and no hierarchy will be created. :param subrange: The subrange to add :param place_at: The desired location of the memorymap fragment. Overrides the subranges preference. :return: The address where the subrange is placed
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property
bus_word_width_bytes¶
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property
byte_len¶ Calculate the size (based on the resource with the highest address part) of the memorymap :return: the size of the memorymap in bytes (aligned to the bus word width)
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property
direct_children¶
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property
direct_children_byte_len¶ Calculate the size (based on the _normal_ resource with the highest address part) of the memorymap :return: the size of the memorymap in bytes (aligned to the bus word width)
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find_recursive(obj, go_up=False)¶ Searches recursively for the given object and returns the associated address. If the object is not found, None is returned :param go_up: Determine if we should search upwards in the hierarchy if we are not the top memorymap :rtype: Address :param obj: the object to look for
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property
flattened¶
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property
is_empty¶
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is_free(check_address)¶ Check if the provided address is free. :param check_address: the address to check. :return: A boolean indicating if the address is free
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property
own_offset¶
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property
path¶
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property
subranges¶
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property
top_memorymap¶
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property
was_inlined¶
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property
naps.soc.peripheral module¶
naps.soc.peripherals_aggregator module¶
naps.soc.program_fatbitstream_local module¶
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naps.soc.program_fatbitstream_local.program_fatbitstream_local(fatbitstream, run=False)¶
naps.soc.program_fatbitstream_ssh module¶
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naps.soc.program_fatbitstream_ssh.program_fatbitstream_ssh(fatbitstream_file: pathlib.Path, *, run=False, dir='fatbitstreams', **kwargs)¶
naps.soc.smoke_test module¶
naps.soc.soc_platform module¶
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class
naps.soc.soc_platform.SocPlatform(platform, *args, **kwargs)¶ Bases:
abc.ABC-
base_address= None¶
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prepare_soc(elaboratable)¶
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naps.soc.soc_platform.soc_platform_name(obj)¶
naps.soc.soc_platform_test module¶
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class
naps.soc.soc_platform_test.ConcreteSocPlatform(platform, *args, **kwargs)¶
naps.soc.tracing_elaborate module¶
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class
naps.soc.tracing_elaborate.ElaboratableSames¶ Bases:
object-
get_by_filter(something, item_filter)¶
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get_elaboratable(something)¶
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get_module(something)¶
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get_row(something)¶
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insert(a, b)¶
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naps.soc.tracing_elaborate.fragment_get_with_elaboratable_trace(elaboratable, platform, sames=None)¶
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naps.soc.tracing_elaborate.inject_elaborate_wrapper(obj, sames)¶