naps.cores.mipi package

Submodules

naps.cores.mipi.aligner module

class naps.cores.mipi.aligner.LaneWordAligner(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

A timeout based word aligner. Issues a bitslip request to the PHY if for a specified time no valid packet (as indicated by a upper layer) was received.

elaborate(platform)

naps.cores.mipi.combiner module

class naps.cores.mipi.combiner.MipiLaneCombiner(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

Combines 1 to 4 lanes to a 32 bit word that can be used for parsing the packet header. Also assists with the training of multiple lanes.

elaborate(platform)

naps.cores.mipi.mipi_test module

class naps.cores.mipi.mipi_test.MipiTest(methodName='runTest')

Bases: unittest.case.TestCase

test_aling_testdata_0()

naps.cores.mipi.packet module

class naps.cores.mipi.packet.DataIdentifier(*args, **kwargs)

Bases: naps.data_structure.packed_struct.PackedStructBaseClass

data_type = unsigned(6)
is_long_packet()
virtual_channel_identifier = unsigned(2)
class naps.cores.mipi.packet.LongPacketDataType(value)

Bases: enum.Enum

An enumeration.

RAW10 = 43
RAW12 = 44
RAW14 = 45
RAW6 = 40
RAW7 = 41
RAW8 = 42
class naps.cores.mipi.packet.MipiCSIPacketLayer(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)
class naps.cores.mipi.packet.PacketHeader(*args, **kwargs)

Bases: naps.data_structure.packed_struct.PackedStructBaseClass

calculate_ecc()
data_id: naps.cores.mipi.packet.DataIdentifier
ecc: unsigned(8)
is_packet_valid()
word_count: unsigned(16)
class naps.cores.mipi.packet.ShortPacketDataType(value)

Bases: enum.Enum

An enumeration.

FRAME_END = 1
FRAME_START = 0
LINE_END = 3
LINE_START = 2

naps.cores.mipi.py_dsi_generator module

class naps.cores.mipi.py_dsi_generator.DataIdentifier(*args, **kwargs)

Bases: naps.data_structure.packed_struct.PackedStructBaseClass

data_type: unsigned(6)
is_long_packet()
virtual_channel_identifier: unsigned(2)
class naps.cores.mipi.py_dsi_generator.DataType(value)

Bases: enum.IntEnum

An enumeration.

class naps.cores.mipi.py_dsi_generator.LongPacketDataType(value)

Bases: naps.cores.mipi.py_dsi_generator.DataType

An enumeration.

BLANKING_PACKET_NO_DATA = 25
DCS_LONG_WRITE_WRITE_LUT_COMMAND_PACKET = 57
GENERIC_LONG_WRITE = 41
LOOSELY_PACKET_PIXEL_STREAM_18_BIT_RGB_6_6_6 = 46
LOOSELY_PACKET_PIXEL_STREAM_20_BIT_YCBCR_4_2_2 = 12
NULL_PACKET_NO_DATA = 9
PACKED_PIXEL_STREAM_12_BIT_YCBCR_4_2_0 = 61
PACKED_PIXEL_STREAM_16_BIT_RGB_5_6_5 = 14
PACKED_PIXEL_STREAM_16_BIT_YCBCR_4_2_2 = 44
PACKED_PIXEL_STREAM_18_BIT_RGB_6_6_6 = 30
PACKED_PIXEL_STREAM_24_BIT_RGB_8_8_8 = 62
PACKED_PIXEL_STREAM_24_BIT_YCBCR_4_2_2 = 28
PACKED_PIXEL_STREAM_30_BIT_RGB_10_10_10 = 13
PACKED_PIXEL_STREAM_36_BIT_RGB_12_12_12 = 29
class naps.cores.mipi.py_dsi_generator.ShortPacketDataType(value)

Bases: naps.cores.mipi.py_dsi_generator.DataType

An enumeration.

COLOR_MODE_OFF = 2
COLOR_MODE_ON = 18
DCS_READ_0_PARAMETER = 6
DCS_SHORT_WRITE_0_PARAMETER = 5
DCS_SHORT_WRITE_1_PARAMETER = 21
END_OF_TRANSMISSION_PACKET = 8
GENERIC_READ_0_PARAMETER = 4
GENERIC_READ_1_PARAMETER = 20
GENERIC_READ_2_PARAMETER = 36
GENERIC_SHORT_WRITE_0_PARAMETER = 3
GENERIC_SHORT_WRITE_1_PARAMETER = 19
GENERIC_SHORT_WRITE_2_PARAMETER = 35
H_SYNC_END = 49
H_SYNC_START = 33
SET_MAXIMUM_RETURN_PACKET_SIZE = 55
SHUT_DOWN_PERIPHERAL = 34
TURN_ON_PERIPHERAL = 50
V_SYNC_END = 17
V_SYNC_START = 1
naps.cores.mipi.py_dsi_generator.assemble(generator)
naps.cores.mipi.py_dsi_generator.calculate_ecc(bytes)
naps.cores.mipi.py_dsi_generator.color_line(r, g, b, length)
naps.cores.mipi.py_dsi_generator.packet_header(data_type, payload=(const 16'd0))

naps.cores.mipi.s7_rx_phy module

class naps.cores.mipi.s7_rx_phy.MipiClockRxPhy(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

Drives the sync domain with the word clock and produces a ddr bit clock derived from the clock lane at pin

elaborate(platform)
class naps.cores.mipi.s7_rx_phy.MipiLaneRxPhy(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)

naps.cores.mipi.s7_tx_phy module

class naps.cores.mipi.s7_tx_phy.MipiMultiLaneTxPhy(*args, src_loc_at=0, **kwargs)

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)

Module contents